Abstract:

Modern deep learning models, particularly transformer-based architectures, demand substantial memory and computational resources, often resulting in inefficiencies during training. While previous research has primarily focused on tracking basic tensor metadata such as shape and size, gaining a deeper understanding of tensor lifecycles and similarity patterns can uncover inefficiencies in tensor management and guide more effective optimization strategies.

In this paper, we introduce a lightweight and extensible tensor tracking framework that captures the complete lifecycle of tensors, including their creation, usage, metadata, and destruction, while also measuring tensor similarity using configurable thresholds. Additionally, we investigate the potential for safe tensor de-duplication to minimize memory usage without degrading model performance.

Our framework integrates seamlessly with PyTorch and operates without requiring modifications to the model architecture, offering valuable insights into tensor behavior. To illustrate its utility, we apply the framework during the fine-tuning of BERT on the IMDB sentiment classification task, revealing key patterns in tensor reuse and redundancy.

This work lays the groundwork for future memory optimization strategies and offers actionable insights into tensor dynamics, enabling more efficient and transparent training in resource-constrained environments.

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Acknowledgments:

Abstract:

In today’s world, where higher education plays an increasingly critical role, aligning academic curricula with industry needs is essential. This paper investigates the contextual relationship between computing courses and technical job requirements by leveraging various transformer models to encode course syllabi and job descriptions into high-quality, fixed-size vector embeddings. These embeddings allow for efficient, nuanced comparisons that uncover deeper connections between academic content and workforce demands.

Our study offers several unique contributions that fill key gaps in existing literature. First, we compile a large and up-to-date dataset of 197,296 job postings across five technical domains. Second, we conduct a detailed analysis using advanced transformer-based models to assess how well computing courses align with job descriptions, providing rich insights into curriculum-industry relevance. Third, we examine salary trends to identify which courses and associated skills are linked to high-paying jobs. Fourth, we differentiate between core and elective courses to inform curriculum design and help students make more strategic elective choices in light of industry needs.

Our findings reveal that top-ranked courses often integrate both technical expertise and essential professional skills such as communication and teamwork. Additionally, skills like cloud computing and database technologies appear consistently across various job categories, underlining their value in today’s technical landscape. Core courses, which are required for all students, generally show stronger alignment with industry requirements than electives. Notably, undergraduate courses tend to have broader alignment with job postings, whereas graduate-level courses show more targeted alignment with higher-paying positions. This distinction emphasizes the importance of aligning academic paths with specific career goals when considering graduate education.

Overall, this paper presents a replicable methodology for curriculum analysis and demonstrates its effectiveness through a case study of a computing program at a single institution.

Publications:

Christopher Lukas Kverne*, Federico Monteverdi*, Agoritsa Polyzou, Christine Lisetti, and Janki Bhimani, Course-Job Fit: Understanding the Contextual Relationship Between Computing Courses and Employment Opportunities, 2025 ASEE Annual Conference (ASEE’25), Montreal, QC, Canada. Acceptance Rate: 20%.

Public Software:

1. https://github.com/Damrl-lab/Course-Job-Fit

Acknowledgments:

NSF

Abstract:

Traditionally, quantum computing has treated hardware noise as an unwanted artifact to be minimized through error mitigation and correction. However, we propose a shift in perspective, particularly for quantum machine learning (QML), suggesting that quantum noise should be embraced and leveraged as a potential advantage, rather than viewed solely as a hindrance. Recent studies on noisy intermediate-scale quantum (NISQ) devices demonstrate that intentionally introducing noise can improve training stability and maintain model performance over extended periods (e.g., 190 days of hardware drift) without retraining, outperforming models that ignore noise across different platforms.

These early results suggest a broader insight: algorithms that adapt to and exploit hardware noise are better suited to the constraints of real quantum systems, transforming what has long been seen as a limitation into a functional feature. Moreover, current noise mitigation techniques often come with high computational costs and limited benefits. In this paper, we analyze how noise affects QML algorithms, compare various noise injection techniques, identify beneficial noise patterns, and propose several novel methods, including a noise-adapted performance ratio, noise-assisted quantum subspace expansion, noise-driven natural-gradient approximation, and dynamic noise profiling.

By treating noise as a computational asset, these approaches have shown measurable gains: up to 25% improvement in convergence speed, 20% increases in classification accuracy, and a reduction of 0.05 in energy estimation error.

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Acknowledgments:

Abstract:

We argue that the default page allocation strategy used in state-of-the-art (SOTA) memory tiering systems, where new pages are always allocated to DRAM until it reaches capacity, and subsequent pages are assigned to slower tiers such as CXL memory and persistent memory (PMEM), is not suitable for all workloads or operating conditions. This rigid allocation approach can often be suboptimal, leading to inefficient memory utilization.

To support this claim, we analyze the impact of page allocation strategies on workload performance. We introduce two memory access tracking kernels: one that captures a high volume of memory access events with fine granularity, and a lightweight alternative seamlessly integrated into the kernel. These tracking mechanisms pave the way for the development of a dynamic allocation policy system capable of adjusting allocation strategies based on workload characteristics.

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Acknowledgments:

Abstract:

An essential challenge in distributed systems, including databases, big data frameworks, and large-scale computing platforms, is managing workloads that exceed available memory capacity. A common strategy to mitigate memory pressure is data spilling, where excess data is offloaded from memory to disk. This technique is widely used in distributed storage engines, stream processing frameworks, and computational clusters to maintain system stability and handle memory-intensive workloads. While data spilling enhances scalability, cost efficiency, and robustness, it also introduces performance bottlenecks due to increased I/O overhead, leading to slower execution. Our analysis reveals that existing implementations suffer from suboptimal parallelism and poor coordination, resulting in underutilized resources and execution delays.

Addressing these inefficiencies is crucial for optimizing data spilling mechanisms and improving overall system performance. Therefore, in this paper, we introduce PARADISE, a framework that enhances data spilling in distributed systems through two key techniques. First, we propose Parallel Spilling, which efficiently groups spillable data objects within an execution engine and spills them together in parallel. This approach opportunistically spills more than the minimum required, reducing recurrent spill triggers and improving efficiency. Second, we introduce Coordinated Spilling, which synchronizes spilling across all nodes in a distributed system to enhance overall performance. Our key insight is that when a task on one node is delayed due to spilling, the entire task experiences increased latency, regardless of how efficiently other nodes execute their portions. By enforcing synchronized data spilling across all nodes handling the same task, we aim to prevent uncoordinated spills that increase latency for multiple queries.

We implemented our innovative spilling techniques in Presto version 0.290 and evaluated them using diverse queries from established benchmarks like TPC-H. Our results demonstrate up to an 85% reduction in task latency with parallel spilling and 50% or more improvement with coordinated spilling, highlighting the effectiveness of our approach.

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Acknowledgments:

Abstract:

DNN model versions are used for various purposes, including fine-tuning for downstream tasks, explainability, and debugging. Numerous checkpointing solutions can be adapted to persist intermediate versions of a model during training at different storage locations. Additionally, version management tools enable logging, visualization, comparison, and querying of metadata related to machine learning models, allowing users to track changes made to previously built models.

However, the version creation process in existing methods often incurs high runtime and storage overhead. In this paper, we introduce LATTICE, a low-latency, direct persistence-based DNN versioning library designed for Non-Volatile Memory (NVM) expansion devices. LATTICE minimizes stalls during model versioning and reduces end-to-end versioning time by reorganizing the version creation workflow, streamlining memory allocation and deallocation for efficient snapshot creation, and leveraging multi-threaded parallelism. We also develop a user-friendly versioning API that transparently implements direct persistence.

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Acknowledgments:

Abstract:

Training large Deep Neural Networks (DNNs) is inherently resource-intensive and time-consuming, driving significant research into high-frequency checkpointing to enhance fault tolerance. However, the overhead associated with checkpointing can prolong overall training times. State-of-the-art (SOTA) solutions break down the checkpointing process into smaller phases, such as snapshot and persist, and pipeline these phases alongside foreground training operations. Additionally, some strategies leverage faster dynamic or persistent memory devices to reduce overhead.

Despite these advancements, SOTA methods still struggle to eliminate training stalls (i.e., overheads), primarily due to two critical constraints: (1) a bandwidth-limited PCIe bus, and (2) consistency requirements for copying the entire model state from the GPU. Drawing inspiration from previous research on model state re-initialization, we explore the possibility of relaxing these consistency requirements during failure recovery.

Based on our findings, we propose Fragment, a novel checkpointing solution that strategically divides the model state into multiple independent pieces (referred to as fragments), reducing checkpointing overhead and increasing checkpointing frequency, all without significantly impacting model accuracy. Partitioning complex models into fragments introduces challenges, which we address by ensuring model state integrity during both creation and restoration, while also optimizing layer selection.

Fragment reduces checkpointing overheads by 15% to 94%, and the total data checkpointed by 43% to 72%, without compromising fault-tolerance compared to SOTA solutions. It can also reduce recovery time by up to 70% following a failure. Moreover, Fragment is orthogonal to most existing checkpointing methods and can be used to further optimize them.

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Acknowledgments:

Abstract: 

Quantum Neural Networks (QNNs) harness quantum superposition and entanglement, offering promising advantages for machine learning tasks. However, noise in quantum computers frequently disrupts QNN training, leading to wasted computational resources and extended queue times. This project introduces the first QNN checkpointing framework to address this challenge. Through experiments on various quantum devices, we demonstrate that QNN behavior is fundamentally hardware-dependent, with the same model performing differently across platforms. This key finding highlights that quantum checkpoints require additional metadata about hardware specifics and shot counts unique to quantum systems. Our framework requires minimal storage, only 186.6 KB for a 100-qubit QNN, and incurs negligible overhead, enabling frequent checkpointing to enhance training resilience and reproducibility in the NISQ era.

Publications: 

Christopher Lukas Kverne*, Mayur Akewar*, Yuqian Huo, Tirthak Patel, and Janki Bhimani, Quantum Neural Networks Need Checkpointing, 2025 ACM Workshop on Hot Topics in Storage and File Systems (HotStorage ’25), Boston.

Public Software:

1. https://github.com/Damrl-lab/Quantum-Checkpointing

Acknowledgments:

NSF

 Abstract:

Environmental stressors such as temperature, humidity, vibration, and radiation can severely impact the performance and reliability of SSDs, particularly in edge, automotive, aerospace, and datacenter deployments. Capturing sensor data in the field and conducting accelerated lab experiments are challenging, as they are time-consuming, resource-intensive, and often destructive to hardware. Specialized setups, such as thermal chambers or vibration rigs, are also required. As a result, few studies explore this area, and current storage management techniques, such as RAID, tiering, and deduplication, do not account for environmental factors.

Developing models to capture these impacts would open new research opportunities across various fields. However, accurately modeling these effects remains challenging due to: (1) the limited availability of experimental data; (2) the complex, domino-like impact of historical exposure; (3) the interrelated nature of environmental factors, such as temperature and humidity, which are often correlated; (4) the differing responses of NAND flash memory types (TLC, MLC, and SLC) to environmental stressors; and (5) the difficulty analytical and simple machine learning models face in generalizing across devices, environments, and unseen combinations of stressors.

We believe that large language models (LLMs) may offer a transformative alternative to this complex problem. With embedded domain knowledge and reasoning capabilities, LLMs can facilitate prompt-based natural language interaction. We propose a hybrid framework that combines Chain-of-Thought prompting and Retrieval-Augmented Generation to guide LLMs using physical principles and prior experiments. This approach enables interpretable “what-if” analyses of SSD behavior under varying environmental conditions.

Publications:

Mayur Akewar*, Gang Quan, Sandeep Madireddy, and Janki Bhimani, Can LLMs Model the Environmental Impact on SSD?, 2025 ACM Workshop on Hot Topics in Storage and File Systems (HotStorage ’25), Boston.

Public Software:

1. https://github.com/Damrl-lab/SSD_LLM

Acknowledgments:

NSF

Abstract:

Data storage and ingestion (DSI) pipelines in machine learning (ML) training are responsible for fetching raw data from storage and pre-processing them before loading the samples
into GPU for training. To improve DSI performance, raw or pre-processed data is cached closer to the accelerator. Although caching pre-processed data over raw is an effective technique to mitigate pre-processing stalls, it comes at a cost of up to 15× higher data footprint. In this work, we present a model that explores the trade-off between raw and pre-processed caching. We build an online system that uses the model to identify the optimal memory split for the raw and pre-processed caches based on the size of the data set and the system parameters. Our model helps improve GPU utilization by increasing the DSI throughput by up to 2×. Furthermore, we demonstrate the usefulness of our model by exploring the performance of hypothetical system designs, should GPU or CPU performance increase.

Publications:

Acknowledgments: